ST公司的STGAP2SCM是電流隔離1700V單個(gè)柵極驅(qū)動(dòng)器，能隔離柵極驅(qū)動(dòng)通路與低壓控制電路和接口電路。驅(qū)動(dòng)電流4A，并具有軌到軌輸出，是得器件適合于大功率逆變器應(yīng)用如工業(yè)應(yīng)用中的馬達(dá)驅(qū)動(dòng)器。器件有兩種不同的配置：單獨(dú)輸出引腳允許采用專用柵極電阻來單獨(dú)優(yōu)化開和關(guān)閉狀態(tài)。其二，單輸出引腳和米勒箝位功能在半橋拓?fù)渲锌焖贀Q向時(shí)避免出現(xiàn)柵極尖峰。兩種配置具有高度靈活性，并大大降低了外接元件。器件集成的保護(hù)功能包括UVLO和熱關(guān)斷。而雙輸入引腳可選擇控制信號(hào)的極性，同時(shí)可實(shí)現(xiàn)HW聯(lián)鎖保護(hù)，以避免控制器故障時(shí)所出現(xiàn)的交叉導(dǎo)通。輸入到輸出傳輸時(shí)延在80ns內(nèi)，提供高PWM控制精度。柵極驅(qū)動(dòng)電壓高達(dá)26V，帶延遲的3.3V，5V TTL/CMOS輸入，主要用在家用電器，工廠自動(dòng)化，工業(yè)驅(qū)動(dòng)和風(fēng)扇的馬達(dá)驅(qū)動(dòng)，600V/1200V逆變器，電池充電器，電感加熱，焊接，UPS，電源單元，DC/DC轉(zhuǎn)換器以及功率因素修正。本文介紹了STGAP2SCM主要特性，框圖，多種應(yīng)用電路以及評(píng)估板EVALSTGAP2SCM主要特性，電路圖，材料清單和PCB設(shè)計(jì)圖。

The STGAP2S is a single gate driver whichisolates the gate driving channel from the lowvoltage control and interface circuitry.

The gate driver is characterized by 4 A capabilityand rail-to-rail outputs， making the device alsosuitable for high power inverter applications suchas motor drivers in industrial applications.The device is available in two differentconfigurations. The configuration with separatedoutput pins allows to independently optimizeturnonand turn-off by using dedicated gate resistors.

A configuration featuring single output pin andMiller clamp function prevents gate spikes duringfast commutations in half-bridge topologies.

Both configurations provide high flexibility and billof material reduction for external components.The device integrates protection functions： UVLOand thermal shutdown are included to easilydesign high reliability systems. Dual input pinsallow choosing the control signal polarity and alsoimplementing HW interlocking protection in orderto avoid cross-conduction in case of controllermalfunction.

The input to output propagation delay resultscontained within 80 ns， providing high PWMcontrol accuracy.A standby mode is available in order to reduceidle power consumption.

STGAP2SCM主要特性：

? 1700 V single channel gate driver

? Driver current capability： 4 A sink/sourceat 25℃

? dV/dt transient immunity ± 100 V/ns

? Overall input-output propagation delay： 80 ns

? Separate sink and source for easy gate drivingconfiguration

? 4 A Miller clamp dedicated pin

? UVLO function

? Gate driving voltage up to 26 V

? 3.3 V， 5 V TTL/CMOS inputs with hysteresis

? Temperature shutdown protection

? Standby function

STGAP2SCM應(yīng)用：

? Motor driver for home appliances， factoryautomation， industrial drives and fans.

? 600/1200 V inverters

? Battery chargers

? Induction heating

? Welding

? UPS

? Power supply units

? DC-DC converters

? Power factor correction

圖1.STGAP2SCM框圖-單獨(dú)輸出選擇

圖2.STGAP2SCM框圖-單獨(dú)輸出和米勒箝位選擇

圖3.STGAP2SCM單極和雙極柵極驅(qū)動(dòng)的電源配置圖

圖4.STGAP2SCM應(yīng)用框圖-單獨(dú)輸出

圖5.STGAP2SCM應(yīng)用框圖-單獨(dú)輸出和負(fù)柵極驅(qū)動(dòng)

圖6.STGAP2SCM應(yīng)用框圖-米勒箝位

圖6.STGAP2SCM應(yīng)用框圖-米勒箝位和負(fù)柵極驅(qū)動(dòng)

評(píng)估板EVALSTGAP2SCM

STMicroelectronics EVALSTGAP2SCM Demonstration Board is used to evaluate the STGAP2SCM. The STGAP2SCM is an isolated single gate driver with a 4A current capability and rail-to-rail outputs. This makes the device ideal for high power inverter applications like motor drivers in industrial applications equipped with MOSFET/IGBT/SiC power switches. Two different variants are available： one with separated source and sink outputs， the other with single output pin and a dedicated pin for Miller clamp function. The EVALSTGAP2S is suitable for both output configuration variants.

The EVALSTGAP2S board allows evaluating allthe STGAP2SCM features while driving a halfbridgepower stage with voltage rating up to 1700V in TO-220 or TO-247 package.

The board facilitates the selection andmodification of the values of relevant externalcomponents in order to ease driver’s performanceevaluation under different applicative conditionsand fine pre-tuning of final applicationcomponents.

評(píng)估板EVALSTGAP2SCM主要特性：

High voltage rail up to 1700V

Driver current capability：

4A source/sink at 25℃

Separate sink and source for simplified gate driving configuration （STGAP2SM）

4A Miller clamp （STGAP2SCM）

Short propagation delay： 100ns

UVLO function

Gate driving voltage up to 26V

Negative gate driving

On-board isolated DC-DC converters to supply

gate drivers， fed by VAUX = 5V

VDD logic supply local 3.3V or VAUX

3.3V， 5V TTL/CMOS inputs with hysteresis

Easy jumper selection of driving voltage configuration：

+15/0V; +15/-3V; +19/0V; +19/-3V

Temperature shutdown protection

圖7.評(píng)估板EVALSTGAP2SCM外形圖

圖8.評(píng)估板EVALSTGAP2SCM電路圖（1）：單獨(dú)輸出柵極驅(qū)動(dòng)

圖9.評(píng)估板EVALSTGAP2SCM電路圖（2）：單獨(dú)輸出和米勒箝位的柵極驅(qū)動(dòng)

圖10.評(píng)估板EVALSTGAP2SCM電路圖（3）：電源，連接器和去耦

評(píng)估板EVALSTGAP2SCM材料清單：

圖11.評(píng)估板EVALSTGAP2SCM PCB設(shè)計(jì)圖：頂層元件布放圖

圖12.評(píng)估板EVALSTGAP2SCM PCB設(shè)計(jì)圖：底層元件布放圖

圖13.評(píng)估板EVALSTGAP2SCM PCB設(shè)計(jì)圖：頂層布局圖

圖14.評(píng)估板EVALSTGAP2SCM PCB設(shè)計(jì)圖：底層布局圖

詳情請見：

https://www.st.com/content/ccc/resource/technical/layouts_and_diagrams/schematic_pack

/group0/a5/25/94/36/2f/d9/4a/9a/EVALSTGAP2SCM_SCHEMATICS/files/EVALSTGAP2SCM_SCHEMATICS.pdf

/jcr:content/translations/en.EVALSTGAP2SCM_SCHEMATICS.pdf

和https://www.st.com/content/ccc/resource/technical/document/bill_of_materials/group0/c8/7a

/24/ed/d7/f3/42/ed/EVALSTGAP2SCM_Bill_of_Material/files/EVALSTGAP2SCM_BOM.pdf/jcr:content

/translations/en.EVALSTGAP2SCM_BOM.pdf

en.EVALSTGAP2SCM_BOM.pdf

en.EVALSTGAP2SCM_SCHEMATICS.pdf

evalstgap2scm.pdf