The SA8025 is a 3V, 1.8GHz, SSOP 20-pin packaged fractional-N
phase locked-loop (PLL) frequency synthesizer. It is targeted for
systems like the Japan Personal Handy Phone System (PHS,
formerly PHP) which demands fast switching time and good noise
performance. Built on the QUBiC BiCMOS process, it has phase
detectors with maximum frequency of 5MHz and an auxiliary
synthesizer that can operate up to 150MHz. This design was based
on the UMA1005 (all CMOS), an earlier version fractional-N
synthesizer which requires an external prescaler for 1 and 2GHz
applications. There is also a 1GHz version fractional-N PLL
frequency synthesizer, the SA7025, available for systems operating
under 1GHz. One should expect the performance of the SA8025
and SA7025 to be comparable to the UMA1005 with an extra
prescaler. This application note will serve as a supplement to the
application note for the UMA1005 (Report N SCO/AN92002) or as
a stand-alone document specifically for the SA8025.