半導(dǎo)體制造業(yè)是現(xiàn)代工業(yè)的重要組成部分，也是一個(gè)資金高度密集、生產(chǎn)流程相當(dāng)復(fù)
雜的行業(yè)。其中芯片的封裝和測(cè)試是半導(dǎo)體制造業(yè)一個(gè)非常重要的環(huán)節(jié)，其車間一般采取隔間式布局（Bay Layout），在這種布局中，車間被分為很多隔間來(lái)放置工藝設(shè)備，同一隔間放置相同的設(shè)備，并設(shè)立WIP 存放區(qū)，對(duì)于某一隔間而言，如何放置這些相同的設(shè)備以及設(shè)置WIP 存放區(qū)，使得整個(gè)隔間的物料搬運(yùn)成本最小且面積利用率最大成了隔間布局的優(yōu)化目標(biāo)，本文針對(duì)隔間布局這一目標(biāo)，并結(jié)合半導(dǎo)體封裝測(cè)試車間整體布局，建立了隔間布局優(yōu)化數(shù)學(xué)模型，并提出一種新的優(yōu)化算法進(jìn)行解決。
關(guān)鍵詞：間式布局；物料搬運(yùn)成本；面積利用率；優(yōu)化數(shù)學(xué)模型
Abstract：Semiconductor manufacturing industry which is highly capital-intensive and complex manufacturing process is an important component of modern industry, and, assembly and test of chips are the very important processes of semiconductor manufacturing. In assembly and test department, the facility layout is Bay-Layout in which the department is formed of bays and same machines are located in one bay and WIP area is also located. So, for one bay, how to allocate the machines and WIP area to minimize the material handing cost and maximize the utilized rate of area are the optimal object of Bay-Layout, and in this paper, the optimal mathematic model of Bay-Layout is established and a new solving algorithm for this mathematic model is proposed.
Key words：Bay-Layout, material handing cost, utilized rate of area, optimal mathematic model